000 -LEADER |
fixed length control field |
01286cam a22003134a 4500 |
001 - CONTROL NUMBER |
control field |
48103058 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
OCoLC |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20181121155238.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
011008s2001 maua b 000 0 eng c |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
0201733579 |
040 ## - CATALOGING SOURCE |
Original cataloging agency |
FOP |
Transcribing agency |
FOP |
Modifying agency |
OKS |
-- |
TXH |
-- |
OCLCQ |
-- |
WSU |
042 ## - AUTHENTICATION CODE |
Authentication code |
pcc |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.39/2 |
Edition number |
21 |
Item number |
S M E |
090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (OCLC) |
Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) |
TK7885.7 |
Local cutter number (OCLC) ; Book number/undivided call number, CALL (RLIN) |
.S64 2001 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Smith, Michael John Sebastian |
9 (RLIN) |
9826 |
245 10 - TITLE STATEMENT |
Title |
Excerpts of chapters 10 & 11 from Application-specific integrated ciruits : |
Remainder of title |
an introduction to VHDL & Verilog HDL / |
Statement of responsibility, etc |
Michael John Sebastian Smith |
246 30 - VARYING FORM OF TITLE |
Title proper/short title |
Introduction to VHDL & Verilog HDL |
246 30 - VARYING FORM OF TITLE |
Title proper/short title |
Introduction to VHDL and Verilog HDL |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
Place of publication, distribution, etc |
Boston, Mass. : |
Name of publisher, distributor, etc |
Addison-Wesley, |
Date of publication, distribution, etc |
c2001 |
300 ## - PHYSICAL DESCRIPTION |
Extent |
379-557 p. : |
Other physical details |
ill. ; |
Dimensions |
24 cm |
500 ## - GENERAL NOTE |
General note |
"This supplement for your course is provided to you by the author and Addison-Wesley at no additional cost"--Cover |
504 ## - BIBLIOGRAPHY, ETC. NOTE |
Bibliography, etc |
Includes bibliographical references |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
VHDL (Computer hardware description language) |
9 (RLIN) |
1850 |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Verilog (Computer hardware description language) |
9 (RLIN) |
9827 |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Application specific intergrated circuits |
9 (RLIN) |
9828 |
700 12 - ADDED ENTRY--PERSONAL NAME |
Personal name |
Smith, Michael John Sebastian. |
Title of a work |
Application specific integrated circuits |
9 (RLIN) |
9829 |
901 ## - LOCAL DATA ELEMENT A, LDA (RLIN) |
a |
Faculty of Engineering |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
|
Item type |
Book |